Refine GPU residue utilities and add positive divisor tests
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Marek Lemańczyk committed
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@@ -1,4 +1,5 @@
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using System.Collections.Concurrent;
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using System.Runtime.CompilerServices;
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using ILGPU;
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using ILGPU.Runtime;
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using static PerfectNumbers.Core.Gpu.GpuContextPool;
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@@ -29,7 +30,7 @@ public sealed class KernelContainer
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public Action<Index1D, ulong, GpuUInt128, GpuUInt128, byte, ulong,
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ulong, ulong, ulong, ulong, ArrayView<ulong>, ArrayView1D<uint, Stride1D.Dense>>? Incremental;
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public Action<Index1D, ulong, GpuUInt128, GpuUInt128, byte, ulong,
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ulong, ulong, ulong, ulong, ArrayView<ulong>, ArrayView1D<uint, Stride1D.Dense>>? Pow2Mod;
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ResidueAutomatonArgs, ArrayView<ulong>, ArrayView1D<uint, Stride1D.Dense>, ArrayView1D<uint, Stride1D.Dense>, ArrayView1D<ulong, Stride1D.Dense>>? Pow2Mod;
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public Action<Index1D, ulong, GpuUInt128, GpuUInt128, byte, ulong,
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ResidueAutomatonArgs, ArrayView<int>, ArrayView1D<uint, Stride1D.Dense>>? IncrementalOrder;
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public Action<Index1D, ulong, GpuUInt128, GpuUInt128, byte, ulong,
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@@ -37,6 +38,8 @@ public sealed class KernelContainer
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// Optional device buffer with small divisor cycles (<= 4M). Index = divisor, value = cycle length.
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public MemoryBuffer1D<uint, Stride1D.Dense>? SmallCycles;
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public MemoryBuffer1D<uint, Stride1D.Dense>? SmallPrimes;
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public MemoryBuffer1D<ulong, Stride1D.Dense>? SmallPrimesPow2;
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public static T InitOnce<T>(ref T? slot, Func<T> factory) where T : class
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{
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@@ -77,17 +80,17 @@ public ref struct GpuKernelLease(IDisposable limiter, GpuContextLease gpu, Kerne
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}
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}
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public readonly Action<Index1D, ulong, GpuUInt128, GpuUInt128, byte, ulong, ulong, ulong, ulong, ulong, ArrayView<ulong>, ArrayView1D<uint, Stride1D.Dense>> Pow2ModKernel
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{
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get
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{
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var accel = Accelerator;
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lock (_gpu!.Value.KernelInitLock)
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{
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return KernelContainer.InitOnce(ref _kernels.Pow2Mod, () => accel.LoadAutoGroupedStreamKernel<Index1D, ulong, GpuUInt128, GpuUInt128, byte, ulong, ulong, ulong, ulong, ulong, ArrayView<ulong>, ArrayView1D<uint, Stride1D.Dense>>(Pow2ModKernelScan));
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}
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}
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}
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public readonly Action<Index1D, ulong, GpuUInt128, GpuUInt128, byte, ulong, ResidueAutomatonArgs, ArrayView<ulong>, ArrayView1D<uint, Stride1D.Dense>, ArrayView1D<uint, Stride1D.Dense>, ArrayView1D<ulong, Stride1D.Dense>> Pow2ModKernel
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{
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get
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{
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var accel = Accelerator;
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lock (_gpu!.Value.KernelInitLock)
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{
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return KernelContainer.InitOnce(ref _kernels.Pow2Mod, () => accel.LoadAutoGroupedStreamKernel<Index1D, ulong, GpuUInt128, GpuUInt128, byte, ulong, ResidueAutomatonArgs, ArrayView<ulong>, ArrayView1D<uint, Stride1D.Dense>, ArrayView1D<uint, Stride1D.Dense>, ArrayView1D<ulong, Stride1D.Dense>>(Pow2ModKernelScan));
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}
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}
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}
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public readonly Action<Index1D, ulong, GpuUInt128, GpuUInt128, byte, ulong, ulong, ulong, ulong, ulong, ArrayView<ulong>, ArrayView1D<uint, Stride1D.Dense>> IncrementalKernel
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{
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@@ -274,49 +277,45 @@ public ref struct GpuKernelLease(IDisposable limiter, GpuContextLease gpu, Kerne
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}
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private static void Pow2ModKernelScan(Index1D index, ulong exponent, GpuUInt128 twoP, GpuUInt128 kStart, byte lastIsSeven, ulong _,
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ulong q0m10, ulong q0m8, ulong q0m3, ulong q0m5, ArrayView<ulong> orders,
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ArrayView1D<uint, Stride1D.Dense> smallCycles)
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ResidueAutomatonArgs ra, ArrayView<ulong> orders,
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ArrayView1D<uint, Stride1D.Dense> smallCycles, ArrayView1D<uint, Stride1D.Dense> smallPrimes,
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ArrayView1D<ulong, Stride1D.Dense> smallPrimesPow2)
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{
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ulong idx = (ulong)index.X;
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ulong step10 = ((exponent % 10UL) << 1) % 10UL;
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ulong r10 = q0m10 + (step10 * idx) % 10UL; r10 -= (r10 >= 10UL) ? 10UL : 0UL;
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bool shouldCheck = r10 != 5UL;
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if (shouldCheck)
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{
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ulong step8 = ((exponent & 7UL) << 1) & 7UL;
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ulong r8 = (q0m8 + ((step8 * idx) & 7UL)) & 7UL;
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if (r8 != 1UL && r8 != 7UL)
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{
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shouldCheck = false;
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}
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ulong r10 = ra.Q0M10 + (ra.Step10 * idx) % 10UL; r10 -= (r10 >= 10UL) ? 10UL : 0UL;
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bool shouldCheck = r10 != 5UL;
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if (shouldCheck)
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{
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ulong r8 = (ra.Q0M8 + ((ra.Step8 * idx) & 7UL)) & 7UL;
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if (r8 != 1UL && r8 != 7UL)
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{
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shouldCheck = false;
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}
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else
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{
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ulong step3 = ((exponent % 3UL) << 1) % 3UL;
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ulong r3 = q0m3 + (step3 * (idx % 3UL)); r3 -= (r3 >= 3UL) ? 3UL : 0UL;
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ulong r3 = ra.Q0M3 + (ra.Step3 * (idx % 3UL)); r3 -= (r3 >= 3UL) ? 3UL : 0UL;
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if (r3 == 0UL)
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{
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shouldCheck = false;
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}
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else
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{
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ulong step5Loc = ((exponent % 5UL) << 1) % 5UL;
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ulong r5 = q0m5 + (step5Loc * (idx % 5UL)); if (r5 >= 5UL) r5 -= 5UL;
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ulong r5 = ra.Q0M5 + (ra.Step5 * (idx % 5UL)); if (r5 >= 5UL) r5 -= 5UL;
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if (r5 == 0UL)
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{
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shouldCheck = false;
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}
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}
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}
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}
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if (!shouldCheck)
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{
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orders[index] = 0UL;
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return;
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}
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}
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if (!shouldCheck)
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{
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orders[index] = 0UL;
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return;
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}
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GpuUInt128 k = kStart + (GpuUInt128)idx;
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GpuUInt128 q = twoP.Mul64(k) + GpuUInt128.One;
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// Small-cycles in-kernel early rejection from device table
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if (q.High == 0UL && q.Low <= (ulong)(smallCycles.Length - 1))
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{
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uint cyc = smallCycles[(int)q.Low];
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@@ -332,9 +331,54 @@ public ref struct GpuKernelLease(IDisposable limiter, GpuContextLease gpu, Kerne
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return;
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}
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int primesLen = (int)smallPrimes.Length;
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for (int i = 0; i < primesLen; i++)
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{
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ulong square = smallPrimesPow2[i];
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if (new GpuUInt128(0UL, square) > q)
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{
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break;
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}
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ulong prime = smallPrimes[i];
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if (Mod128By64(q, prime) == 0UL)
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{
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orders[index] = 0UL;
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return;
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}
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}
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orders[index] = exponent;
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}
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[MethodImpl(MethodImplOptions.AggressiveInlining)]
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private static ulong Mod128By64(GpuUInt128 value, ulong modulus)
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{
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ulong rem = 0UL;
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ulong part = value.High;
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for (int i = 0; i < 64; i++)
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{
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rem = (rem << 1) | (part >> 63);
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if (rem >= modulus)
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{
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rem -= modulus;
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}
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part <<= 1;
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}
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part = value.Low;
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for (int i = 0; i < 64; i++)
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{
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rem = (rem << 1) | (part >> 63);
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if (rem >= modulus)
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{
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rem -= modulus;
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}
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part <<= 1;
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}
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return rem;
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}
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// Device-friendly small cycle length for 2 mod divisor
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private static ulong CalculateCycleLengthSmall(ulong divisor)
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{
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@@ -527,6 +571,33 @@ public class GpuKernelPool
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}
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}
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public static (ArrayView1D<uint, Stride1D.Dense> primes, ArrayView1D<ulong, Stride1D.Dense> primesPow2) EnsureSmallPrimesOnDevice(Accelerator accelerator)
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{
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var kernels = GetKernels(accelerator);
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if (kernels.SmallPrimes is { } p && kernels.SmallPrimesPow2 is { } p2)
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{
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return (p.View, p2.View);
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}
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lock (kernels)
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{
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if (kernels.SmallPrimes is { } existing && kernels.SmallPrimesPow2 is { } existingPow2)
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{
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return (existing.View, existingPow2.View);
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}
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var hostPrimes = PrimesGenerator.SmallPrimes;
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var hostPow2 = PrimesGenerator.SmallPrimesPow2;
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var devicePrimes = accelerator.Allocate1D<uint>(hostPrimes.Length);
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devicePrimes.View.CopyFromCPU(hostPrimes);
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var devicePow2 = accelerator.Allocate1D<ulong>(hostPow2.Length);
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devicePow2.View.CopyFromCPU(hostPow2);
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kernels.SmallPrimes = devicePrimes;
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kernels.SmallPrimesPow2 = devicePow2;
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return (devicePrimes.View, devicePow2.View);
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}
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}
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public static GpuKernelLease GetKernel(bool useGpuOrder)
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{
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var limiter = GpuPrimeWorkLimiter.Acquire();
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