Merge pull request #34 from mlemanczyk/codex/fix-residue-method-iteration-issue

Fix residue kernel modulus reduction for residue Mersenne scan
This commit is contained in:
Marek Lemańczyk authored and GitHub committed 2025-09-20 04:24:25 +02:00
commit 66ac013abc
2 files changed
+28 -6

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@@ -19,5 +19,12 @@ public class MersenneResidueModeTests
var tester = new MersenneNumberTester(useResidue: true, useIncremental: true, maxK: 1_000UL); var tester = new MersenneNumberTester(useResidue: true, useIncremental: true, maxK: 1_000UL);
tester.IsMersennePrime(31UL).Should().BeTrue(); tester.IsMersennePrime(31UL).Should().BeTrue();
} }
[Fact]
public void IsMersennePrime_residue_mode_accepts_prime_exponent_when_scanning_multiple_batches()
{
var tester = new MersenneNumberTester(useResidue: true, useIncremental: true, maxK: 2_100_000UL);
tester.IsMersennePrime(31UL).Should().BeTrue();
}
} }
+21 -6
View File
@@ -312,14 +312,19 @@ public ref struct GpuKernelLease(IDisposable limiter, GpuContextLease gpu, Kerne
} }
else else
{ {
ulong r3 = ra.Q0M3 + (ra.Step3 * (idx % 3UL)); r3 -= (r3 >= 3UL) ? 3UL : 0UL; ulong r3 = ra.Q0M3 + (ra.Step3 * (idx % 3UL));
if (r3 >= 6UL) r3 -= 6UL;
if (r3 >= 3UL) r3 -= 3UL;
if (r3 == 0UL) if (r3 == 0UL)
{ {
shouldCheck = false; shouldCheck = false;
} }
else else
{ {
ulong r5 = ra.Q0M5 + (ra.Step5 * (idx % 5UL)); if (r5 >= 5UL) r5 -= 5UL; ulong r5 = ra.Q0M5 + (ra.Step5 * (idx % 5UL));
if (r5 >= 15UL) r5 -= 15UL;
if (r5 >= 10UL) r5 -= 10UL;
if (r5 >= 5UL) r5 -= 5UL;
if (r5 == 0UL) if (r5 == 0UL)
{ {
shouldCheck = false; shouldCheck = false;
@@ -434,14 +439,19 @@ public ref struct GpuKernelLease(IDisposable limiter, GpuContextLease gpu, Kerne
} }
else else
{ {
ulong r3 = ra.Q0M3 + (ra.Step3 * (idx % 3UL)); r3 -= (r3 >= 3UL) ? 3UL : 0UL; ulong r3 = ra.Q0M3 + (ra.Step3 * (idx % 3UL));
if (r3 >= 6UL) r3 -= 6UL;
if (r3 >= 3UL) r3 -= 3UL;
if (r3 == 0UL) if (r3 == 0UL)
{ {
shouldCheck = false; shouldCheck = false;
} }
else else
{ {
ulong r5 = ra.Q0M5 + (ra.Step5 * (idx % 5UL)); if (r5 >= 5UL) r5 -= 5UL; ulong r5 = ra.Q0M5 + (ra.Step5 * (idx % 5UL));
if (r5 >= 15UL) r5 -= 15UL;
if (r5 >= 10UL) r5 -= 10UL;
if (r5 >= 5UL) r5 -= 5UL;
if (r5 == 0UL) if (r5 == 0UL)
{ {
shouldCheck = false; shouldCheck = false;
@@ -509,14 +519,19 @@ public ref struct GpuKernelLease(IDisposable limiter, GpuContextLease gpu, Kerne
} }
else else
{ {
ulong r3 = ra.Q0M3 + (ra.Step3 * (idx % 3UL)); r3 -= (r3 >= 3UL) ? 3UL : 0UL; ulong r3 = ra.Q0M3 + (ra.Step3 * (idx % 3UL));
if (r3 >= 6UL) r3 -= 6UL;
if (r3 >= 3UL) r3 -= 3UL;
if (r3 == 0UL) if (r3 == 0UL)
{ {
shouldCheck = false; shouldCheck = false;
} }
else else
{ {
ulong r5 = ra.Q0M5 + (ra.Step5 * (idx % 5UL)); if (r5 >= 5UL) r5 -= 5UL; ulong r5 = ra.Q0M5 + (ra.Step5 * (idx % 5UL));
if (r5 >= 15UL) r5 -= 15UL;
if (r5 >= 10UL) r5 -= 10UL;
if (r5 >= 5UL) r5 -= 5UL;
if (r5 == 0UL) if (r5 == 0UL)
{ {
shouldCheck = false; shouldCheck = false;