Clarify cycle stepper reset inlining
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@@ -23,11 +23,12 @@ public class MersenneNumberOrderGpuTester(GpuKernelType kernelType, bool useGpuO
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GpuKernelType.Pow2Mod => gpuLease.Pow2ModOrderKernel,
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_ => gpuLease.IncrementalOrderKernel,
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}; // TODO: Migrate the Pow2Mod branch to the ProcessEightBitWindows order kernel once the shared helper replaces the single-bit ladder so GPU order scans match benchmark wins.
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// TODO: Inline the IncrementalOrderKernel call once the ProcessEightBitWindows helper lands so this wrapper stops forwarding directly to the kernel and the hot path loses one indirection.
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var foundBuffer = accelerator.Allocate1D<int>(1);
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exponent.Mod10_8_5_3Steps(out ulong step10, out ulong step8, out ulong step5, out ulong step3);
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try
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{
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var foundBuffer = accelerator.Allocate1D<int>(1); // TODO: Replace this allocation with the pooled device buffer from GpuOrderKernelBenchmarks so repeated scans reuse the pinned staging memory instead of allocating per run.
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exponent.Mod10_8_5_3Steps(out ulong step10, out ulong step8, out ulong step5, out ulong step3);
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try
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{
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UInt128 remaining;
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int currentSize;
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int found = 0;
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@@ -37,9 +38,12 @@ public class MersenneNumberOrderGpuTester(GpuKernelType kernelType, bool useGpuO
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currentSize = remaining > (UInt128)batchSize ? batchSize : (int)remaining;
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foundBuffer.MemSetToZero();
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// Precompute residue automaton bases for this batch
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UInt128 q0 = twoP * kStart + 1UL;
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q0.Mod10_8_5_3(out ulong q0m10, out ulong q0m8, out ulong q0m5, out ulong q0m3);
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var kernelArgs = new ResidueAutomatonArgs(q0m10, step10, q0m8, step8, q0m3, step3, q0m5, step5);
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UInt128 q0 = twoP * kStart + 1UL;
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// TODO: Replace these modulo recomputations with the divisor-cycle stepping deltas captured in
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// MersenneDivisorCycleLengthGpuBenchmarks so each batch advances via cached residues from the
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// single snapshot block instead of recalculating mod 10/8/5/3 in every iteration.
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q0.Mod10_8_5_3(out ulong q0m10, out ulong q0m8, out ulong q0m5, out ulong q0m3);
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var kernelArgs = new ResidueAutomatonArgs(q0m10, step10, q0m8, step8, q0m3, step3, q0m5, step5);
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// Ensure device has small cycles table for early rejections in order kernels
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