Commit Graph
17 Commits
Author SHA1 Message Date
Marek Lemańczyk ad22329814 Avoid pooling small buffers in CPU divisor pipeline 2025-10-11 21:17:18 +02:00
Marek Lemańczyk 8e9390bc5e Isolate CPU divisor pools per thread 2025-10-11 21:17:12 +02:00
Marek Lemańczyk cd1debe9d6 Various micro- and medium- optimizations 2025-10-07 22:14:34 +02:00
Marek Lemańczyk 26cc574020 Treat Pollard Rho success as the GPU primality check 2025-10-05 06:26:09 +02:00
Marek Lemańczyk 56e3a7695f Tiny cleanup 2025-10-03 19:36:32 +02:00
Marek Lemańczyk ebe48d5f2f Divisor-Cycle Cache Rework 2025-10-02 19:53:09 +02:00
Marek Lemańczyk b8aa845c5c Clarify cycle stepper reset inlining 2025-10-02 13:30:56 +02:00
Marek Lemańczyk 9b9c6959be Reuse cycle remainder stepper in by-divisor testers 2025-09-25 18:51:47 +02:00
Marek Lemańczyk 8b95a42f27 Divisor cycle cache will now respect --divisor-cycles-batch parameter (renamed from --divisor-cycles-batch-size) 2025-09-25 07:02:44 +02:00
Marek Lemańczyk 49fcd93747 GPU logic updated to use prime % divisor result precomputed on CPU instead of re-calculating it on GPU side. Cycle lease removed. 2025-09-25 05:28:23 +02:00
Marek Lemańczyk b58e2be2b0 GPU steps adjusted to prevent overloading it 2025-09-25 03:32:07 +02:00
Marek Lemańczyk 6717005529 Chunk GPU divisor cycle generation to avoid CPU fallback 2025-09-25 03:16:49 +02:00
Marek Lemańczyk ad3effa5fa Throttle GPU cycle generation batches 2025-09-25 02:48:14 +02:00
Marek Lemańczyk b798970ce9 Restore cycle-aware divisor scans and background generation 2025-09-25 02:12:40 +02:00
Marek Lemańczyk d72cfc9748 TODOs added 2025-09-25 00:02:19 +02:00
Marek Lemańczyk a8588d0ec5 Formatting 2025-09-24 23:33:37 +02:00
Marek Lemańczyk d4dcd0a534 Implement multi-tier divisor cycle caching and per-thread reuse 2025-09-24 19:04:07 +02:00