79 lines
2.1 KiB
C#
79 lines
2.1 KiB
C#
using PerfectNumbers.Core.Gpu.Accelerators;
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namespace PerfectNumbers.Core.Cpu;
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public class MersenneNumberOrderCpuTester(GpuKernelType kernelType)
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{
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private readonly GpuKernelType _kernelType = kernelType;
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public void Scan(PrimeOrderCalculatorAccelerator gpu, ulong exponent, UInt128 twoP, LastDigit lastDigit, UInt128 maxK, ref bool isPrime)
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{
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UInt128 k = 1UL;
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var auto = new MersenneResidueAutomaton(exponent);
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UInt128 qCycle,
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q = auto.CurrentQ();
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while (k <= maxK && Volatile.Read(ref isPrime))
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{
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qCycle = MersenneDivisorCycles.GetCycleCpu(q);
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// TODO: When this lookup misses the snapshot, invoke the configured device to compute the
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// single required cycle on demand without persisting it so the CPU order path retains the
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// cycle-stepping speedups while honoring the no-extra-cache constraint for large divisors.
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int allowMask2 = lastDigit == LastDigit.Seven ? CpuConstants.LastSevenMask10 : CpuConstants.LastOneMask10;
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bool shouldCheck = ((allowMask2 >> (int)auto.Mod10R) & 1) != 0;
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if (shouldCheck)
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{
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ulong mod8 = auto.Mod8R;
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if (mod8 != 1UL && mod8 != 7UL)
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{
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shouldCheck = false;
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}
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else if (auto.Mod3R == 0UL || auto.Mod5R == 0UL)
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{
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shouldCheck = false;
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}
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}
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if (shouldCheck)
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{
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if (_kernelType == GpuKernelType.Pow2Mod)
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{
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if (exponent.PowModWithCycle(q, qCycle) == 1UL)
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{
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Volatile.Write(ref isPrime, false);
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break;
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}
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}
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else
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{
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UInt128 phi = q - 1UL;
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if (phi <= ulong.MaxValue)
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{
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ulong phi64 = (ulong)phi;
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if (phi64.PowModWithCycle(q, qCycle) == 1UL)
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{
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UInt128 halfPow = (phi64 >> 1).PowModWithCycle(q, qCycle) - 1UL;
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if (halfPow.BinaryGcd(q) == 1UL)
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{
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ulong divMul = (ulong)((((UInt128)1 << 64) - 1UL) / exponent) + 1UL;
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ulong div = phi64.FastDiv64(exponent, divMul);
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UInt128 divPow = div.PowModWithCycle(q, qCycle) - 1UL;
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if (divPow.BinaryGcd(q) == 1UL)
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{
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Volatile.Write(ref isPrime, false);
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break;
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}
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}
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}
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}
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}
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}
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k += 1UL;
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auto.Next();
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q = auto.CurrentQ();
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}
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return;
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}
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} |