Address windowed pow2 review feedback
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@@ -21,7 +21,7 @@ internal static class DivisorKernels
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ReadOnlyGpuUInt128 readOnlyMod = divisor;
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if (x == 0)
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{
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baseVal = GpuUInt128.Pow2Mod(exponent, in readOnlyMod); // Uses the eight-bit windowed ladder measured fastest in GPU benchmarks.
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baseVal = GpuUInt128.Pow2Mod(exponent, in readOnlyMod);
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result[0] = baseVal.High == 0UL && baseVal.Low == 1UL ? (byte)1 : (byte)0;
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return;
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}
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@@ -38,7 +38,7 @@ internal static class DivisorKernels
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GpuUInt128 pow = baseVal;
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pow.ModPow(exponent / ux, in readOnlyMod);
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var part2 = GpuUInt128.Pow2Mod(exponent % ux, in readOnlyMod); // Windowed pow2 keeps the mixed-radix tail fast.
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var part2 = GpuUInt128.Pow2Mod(exponent % ux, in readOnlyMod);
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GpuUInt128 product = pow;
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ReadOnlyGpuUInt128 part2ReadOnly = part2.AsReadOnly();
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product.MulMod(in part2ReadOnly, in readOnlyMod);
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@@ -96,7 +96,7 @@ internal static class IncrementalKernels
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}
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ulong phi64 = phi.Low;
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if (GpuUInt128.Pow2Mod(phi64, in readOnlyQ) != GpuUInt128.One) // Windowed pow2 keeps the totient check fast.
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if (GpuUInt128.Pow2Mod(phi64, in readOnlyQ) != GpuUInt128.One)
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{
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orders[index] = 0UL;
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return;
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@@ -192,7 +192,7 @@ internal static class IncrementalKernels
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}
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ulong phi64 = phi.Low;
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if (GpuUInt128.Pow2Mod(phi64, in readOnlyQ) != GpuUInt128.One) // Windowed pow2 keeps the order probe aligned with benchmarks.
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if (GpuUInt128.Pow2Mod(phi64, in readOnlyQ) != GpuUInt128.One)
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{
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return;
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}
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@@ -22,7 +22,7 @@ internal static class OrderKernels
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}
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ulong phi64 = phi.Low;
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GpuUInt128 pow = GpuUInt128.Pow2Mod(phi64, in readOnlyQ); // Windowed pow2 keeps the cycle check aligned with benchmark wins.
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GpuUInt128 pow = GpuUInt128.Pow2Mod(phi64, in readOnlyQ);
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if (pow != GpuUInt128.One)
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{
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orders[index] = 0UL;
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@@ -77,7 +77,6 @@ internal static class Pow2ModKernels
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return;
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}
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}
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// Pow2Minus1Mod already routes through the windowed pow2 helper benchmarked as fastest for large divisors.
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if (GpuUInt128.Pow2Minus1Mod(exponent, in readOnlyQ) != GpuUInt128.Zero)
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{
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orders[index] = 0UL;
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@@ -169,7 +168,7 @@ internal static class Pow2ModKernels
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return;
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}
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}
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if (GpuUInt128.Pow2Mod(exponent, in readOnlyQ) != GpuUInt128.One) // Windowed pow2 keeps the order guard aligned with GPU benchmarks.
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if (GpuUInt128.Pow2Mod(exponent, in readOnlyQ) != GpuUInt128.One)
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{
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return;
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}
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@@ -112,7 +112,7 @@ public class MersenneNumberLucasLehmerGpuTester
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var gpu = GpuContextPool.RentPreferred(preferCpu: false);
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var accelerator = gpu.Accelerator;
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var kernel = GetBatchKernel(accelerator); // Batch kernel already relies on the Mersenne squaring reducer; windowed pow2 helpers do not apply here.
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var kernel = GetBatchKernel(accelerator);
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var expBuffer = accelerator.Allocate1D<ulong>(count);
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ulong[] expArray = ArrayPool<ulong>.Shared.Rent(count);
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@@ -479,7 +479,6 @@ public class MersenneNumberLucasLehmerGpuTester
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{
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if ((exponent & 1UL) != 0UL)
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{
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// The base varies per primitive-root candidate, so pow2-specific ladders do not apply.
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result = MulMod(result, value, modulus);
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}
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@@ -22,9 +22,7 @@ public class MersenneNumberOrderGpuTester(GpuKernelType kernelType, bool useGpuO
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{
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GpuKernelType.Pow2Mod => gpuLease.Pow2ModOrderKernel,
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_ => gpuLease.IncrementalOrderKernel,
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}; // Pow2ModOrderKernel already routes through the windowed pow2 helper measured fastest for large divisors.
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// Both GPU order kernels already rely on the windowed pow2 helper, so this wrapper only selects the delegate
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// and manages the scoped GPU resources.
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};
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var foundBuffer = accelerator.Allocate1D<int>(1); // TODO: Replace this allocation with the pooled device buffer from GpuOrderKernelBenchmarks so repeated scans reuse the pinned staging memory instead of allocating per run.
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exponent.Mod10_8_5_3Steps(out ulong step10, out ulong step8, out ulong step5, out ulong step3);
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@@ -985,8 +985,6 @@ public class MersenneDivisorCycles
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private static ulong CalculateCycleLengthFallback(ulong divisor)
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{
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// Otherwise, find order of 2 mod divisor using the shared unrolled-hex stepping sequence.
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// Divisors <= 3 hit this fallback, so the lightweight CPU path already matches the windowed pow2 helper
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// without paying for a GPU round-trip.
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return divisor.CalculateMersenneDivisorCycleLengthUnrolledHexCpu();
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}
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@@ -319,8 +319,6 @@ public sealed class MersenneNumberTester(
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private static void LegacyOrderKernel(Index1D index, ulong exponent, ArrayView<UInt128> qs, ArrayView<ulong> orders)
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{
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UInt128 q = qs[index];
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// The legacy kernel already relies on the adaptive PowMod helper, which switches to the windowed pow2
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// ladder for large divisors.
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UInt128 pow = exponent.PowMod(q);
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orders[index] = pow == 1UL ? exponent : 0UL;
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}
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@@ -17,10 +17,15 @@ public class MersenneResidueStepper
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m = modulus;
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p = p0;
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// Callers hand this stepper pre-reduced residues from the windowed pow2 pipeline; keep the modulo guard for tests
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// while production inputs already arrive inside [0, m).
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M_mod = M_mod_m_at_p0 % m;
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pow2_mod = (M_mod + 1) % m;
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// Inputs are already reduced in production; keep the old modulo guard commented for debugging reference.
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// M_mod = M_mod_m_at_p0 % m;
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// pow2_mod = (M_mod + 1) % m;
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M_mod = M_mod_m_at_p0;
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pow2_mod = M_mod + 1;
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if (pow2_mod >= m)
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{
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pow2_mod -= m;
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}
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}
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// TODO: Inline this accessor into callers so the hot residue path reads the backing fields directly
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