128 lines
4.9 KiB
C#
128 lines
4.9 KiB
C#
using System.Buffers;
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using System.Runtime.InteropServices;
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using ILGPU.Runtime;
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namespace PerfectNumbers.Core.Gpu;
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/// <summary>
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/// Uses GPU kernels to incrementally scan Mersenne candidates for prime exponents p >= 31.
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/// </summary>
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public class MersenneNumberIncrementalGpuTester(GpuKernelType kernelType, bool useGpuOrder)
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{
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private readonly GpuKernelType _kernelType = kernelType;
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private readonly bool _useGpuOrder = useGpuOrder;
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public void Scan(ulong exponent, UInt128 twoP, LastDigit lastDigit, UInt128 maxK, ref bool isPrime)
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{
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throw new NotImplementedException($"GPU incremental scanning requires the device cycle heuristics implementation (kernel: {_kernelType}, GPU order: {_useGpuOrder}).");
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var gpuLease = GpuKernelPool.GetKernel(_useGpuOrder);
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var accelerator = gpuLease.Accelerator;
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var stream = gpuLease.Stream;
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int batchSize = GpuConstants.ScanBatchSize; // large batch improves GPU occupancy
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UInt128 kStart = 1UL;
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ulong divMul = (ulong)((((UInt128)1 << 64) - UInt128.One) / exponent) + 1UL;
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byte last = lastDigit == LastDigit.Seven ? (byte)1 : (byte)0; // ILGPU kernels do not support bool parameters
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var pow2Kernel = gpuLease.Pow2ModKernel;
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var incKernel = gpuLease.IncrementalKernel;
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ulong step10 = (exponent.Mod10() << 1).Mod10();
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ulong step8 = ((exponent & 7UL) << 1) & 7UL;
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ulong step3 = ((exponent % 3UL) << 1) % 3UL;
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ulong step5 = ((exponent % 5UL) << 1) % 5UL;
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GpuUInt128 twoPGpu = (GpuUInt128)twoP;
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var smallCyclesView = GpuKernelPool.EnsureSmallCyclesOnDevice(accelerator);
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ResiduePrimeViews primeViews = default;
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if (_kernelType == GpuKernelType.Pow2Mod)
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{
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primeViews = GpuKernelPool.EnsureSmallPrimesOnDevice(accelerator);
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}
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var orderBuffer = accelerator.Allocate1D<ulong>(batchSize);
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// Avoid giant stack allocations that can trigger StackOverflow when batchSize is large.
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// Rent a reusable array from the shared pool instead.
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ulong[] orderArray = ArrayPool<ulong>.Shared.Rent(batchSize);
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UInt128 remaining;
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int currentSize;
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int i;
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UInt128 q = UInt128.Zero;
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while (kStart <= maxK && Volatile.Read(ref isPrime))
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{
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remaining = maxK - kStart + UInt128.One;
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currentSize = remaining > (UInt128)batchSize ? batchSize : (int)remaining;
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Span<ulong> orders = orderArray.AsSpan(0, currentSize);
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// Precompute residue automaton bases for this batch
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UInt128 q0 = twoP * kStart + UInt128.One;
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if (_kernelType == GpuKernelType.Pow2Mod)
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{
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q0.Mod10_8_5_3(out ulong q0m10, out ulong q0m8, out ulong q0m5, out ulong q0m3);
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var kernelArgs = new ResidueAutomatonArgs(q0m10, step10, q0m8, step8, q0m3, step3, q0m5, step5);
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pow2Kernel(
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stream,
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currentSize,
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exponent,
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twoPGpu,
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(GpuUInt128)kStart,
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last,
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divMul,
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kernelArgs,
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orderBuffer.View,
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smallCyclesView,
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primeViews.LastOne,
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primeViews.LastSeven,
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primeViews.LastOnePow2,
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primeViews.LastSevenPow2);
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}
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else
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{
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q0.Mod10_8_5_3(out ulong q0m10, out ulong q0m8, out ulong q0m5, out ulong q0m3);
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incKernel(
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stream,
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currentSize,
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exponent,
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twoPGpu,
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(GpuUInt128)kStart,
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last,
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divMul,
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q0m10,
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q0m8,
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q0m3,
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q0m5,
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orderBuffer.View,
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smallCyclesView);
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}
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stream.Synchronize();
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orderBuffer.View.CopyToCPU(ref MemoryMarshal.GetReference(orders), currentSize);
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if (_kernelType == GpuKernelType.Pow2Mod)
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{
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for (i = 0; i < currentSize; i++)
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{
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if (orders[i] != 0UL)
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{
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Volatile.Write(ref isPrime, false);
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break;
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}
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}
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}
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else
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{
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q = twoP * kStart + UInt128.One;
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for (i = 0; i < currentSize && Volatile.Read(ref isPrime); i++, q += twoP)
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{
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if (orders[i] != 0UL && q.IsPrimeCandidate())
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{
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Volatile.Write(ref isPrime, false);
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}
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}
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}
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kStart += (UInt128)currentSize;
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}
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ArrayPool<ulong>.Shared.Return(orderArray);
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orderBuffer.Dispose();
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gpuLease.Dispose();
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}
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}
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