120 lines
5.9 KiB
C#
120 lines
5.9 KiB
C#
using System.Buffers;
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using System.Runtime.InteropServices;
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using ILGPU.Runtime;
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namespace PerfectNumbers.Core.Gpu;
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public class MersenneNumberResidueGpuTester(bool useGpuOrder)
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{
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private readonly bool _useGpuOrder = useGpuOrder;
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// TODO: Integrate MersenneDivisorCycles.Shared to consult cycle lengths for small q (<= 4M) and fast-reject
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// candidates without launching heavy kernels. Consider a device-visible constant buffer per-accelerator
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// via GpuKernelPool to avoid host round-trips.
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// GPU residue variant: check 2^p % q == 1 for q = 2*p*k + 1.
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public void Scan(
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ulong exponent,
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UInt128 twoP,
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bool lastIsSeven,
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UInt128 perSetLimit,
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UInt128 setCount,
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UInt128 overallLimit,
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ref bool isPrime,
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ref bool divisorsExhausted)
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{
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if (setCount == UInt128.Zero || perSetLimit == UInt128.Zero || overallLimit == UInt128.Zero)
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{
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return;
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}
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var gpuLease = GpuKernelPool.GetKernel(_useGpuOrder);
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var accelerator = gpuLease.Accelerator;
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// Ensure device has small cycles and primes tables for in-kernel lookup
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var smallCyclesView = GpuKernelPool.EnsureSmallCyclesOnDevice(accelerator);
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ResiduePrimeViews primeViews = GpuKernelPool.EnsureSmallPrimesOnDevice(accelerator);
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int batchSize = GpuConstants.ScanBatchSize;
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byte last = lastIsSeven ? (byte)1 : (byte)0;
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var kernel = gpuLease.Pow2ModKernel;
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ulong step10 = ((exponent % 10UL) << 1) % 10UL;
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ulong step8 = ((exponent & 7UL) << 1) & 7UL;
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ulong step3 = ((exponent % 3UL) << 1) % 3UL;
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ulong step5 = ((exponent % 5UL) << 1) % 5UL;
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GpuUInt128 twoPGpu = (GpuUInt128)twoP;
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var orderBuffer = accelerator.Allocate1D<ulong>(batchSize);
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ulong[] orderArray = ArrayPool<ulong>.Shared.Rent(batchSize);
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UInt128 batchSize128 = (UInt128)batchSize;
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UInt128 limitInclusive = overallLimit == UInt128.MaxValue
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? overallLimit
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: checked(overallLimit + UInt128.One);
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Span<ulong> orders = orderArray.AsSpan(0, batchSize);
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try
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{
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for (ulong setIndex = 0; setIndex < setCount && Volatile.Read(ref isPrime); setIndex++)
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{
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UInt128 setOffset = checked(perSetLimit * (UInt128)setIndex);
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UInt128 setStart = checked(setOffset + UInt128.One);
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if (setStart >= limitInclusive)
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{
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break;
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}
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UInt128 setLimitExclusive = checked(setOffset + perSetLimit);
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setLimitExclusive = setLimitExclusive >= limitInclusive
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? limitInclusive
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: checked(setLimitExclusive + UInt128.One);
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if (setLimitExclusive > limitInclusive)
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{
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setLimitExclusive = limitInclusive;
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}
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UInt128 kStart = setStart;
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while (kStart < setLimitExclusive && Volatile.Read(ref isPrime))
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{
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UInt128 remaining = checked(setLimitExclusive - kStart);
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int currentSize = remaining > batchSize128 ? batchSize : (int)remaining;
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if (currentSize <= 0)
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{
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break;
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}
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orders = orderArray.AsSpan(0, currentSize);
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UInt128 q = checked(twoP * kStart);
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q = checked(q + UInt128.One);
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q.Mod10_8_5_3(out ulong q0m10, out ulong q0m8, out ulong q0m5, out ulong q0m3);
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var ra = new ResidueAutomatonArgs(q0m10, step10, q0m8, step8, q0m3, step3, q0m5, step5);
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kernel(currentSize, exponent, twoPGpu, (GpuUInt128)kStart, last, 0UL,
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ra, orderBuffer.View, smallCyclesView, primeViews.LastOne, primeViews.LastSeven, primeViews.LastOnePow2, primeViews.LastSevenPow2);
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accelerator.Synchronize();
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orderBuffer.View.CopyToCPU(ref MemoryMarshal.GetReference(orders), currentSize);
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if (!Volatile.Read(ref isPrime))
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{
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break;
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}
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for (int i = 0; i < currentSize; i++)
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{
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if (orders[i] != 0UL)
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{
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Volatile.Write(ref isPrime, false);
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break;
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}
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}
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kStart = checked(kStart + batchSize128);
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}
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}
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}
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finally
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{
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ArrayPool<ulong>.Shared.Return(orderArray);
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orderBuffer.Dispose();
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gpuLease.Dispose();
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}
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divisorsExhausted = true;
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}
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}
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